EMI Filter Design for Switch-Mode Power Supplies: Theory, Safety Capacitors and Sizing Procedure

Key Takeaways

EMI filters for switch-mode power supplies (SMPS) must suppress both common-mode (CM) noise (L–G and N–G paths) and differential-mode (DM) noise (L–N path), each requiring distinct components and design approaches.
X capacitors (across L–N, typically 0.1–0.47 µF) target DM noise; Y capacitors (L–G and N–G, ≤4700 pF total) suppress CM noise while complying with strict earth leakage limits (≤0.35 mA for temperate equipment).
Safety capacitor classes are defined by IEC 60384-14: X1 (>2.5 kV), X2 (≤2.5 kV); Y1 (>8 kV, double insulation), Y2 (>5 kV, basic insulation) — substitution with non-certified parts violates safety standards.
CM chokes use ferrite toroids (J/W/K materials) with bifilar windings to present high impedance to in-phase CM currents while offering near-zero impedance to balanced line current; DM chokes use powdered-iron cores (FeSi/FeSiAl) for stable inductance under DC bias.
The filter corner frequency determines component sizing: FR,CM = 40.3 kHz and FR,DM = 12 kHz are typical targets; required inductance follows from L = [1/(2π·FR)]² × 1/(2·C) for CM and L = 1/[(2π·FR)²·C] for DM.
Insertion loss is highly sensitive to layout: mount the filter adjacent to the AC inlet, minimize lead lengths, avoid bundling input/output wiring, and ensure low-inductance grounding to prevent resonance and radiation.

Why EMI Filtering Is Non-Negotiable in SMPS Design

Every switch-mode power supply generates high-frequency conducted electromagnetic interference (EMI) due to rapid voltage and current transitions across MOSFETs and diodes. Without mitigation, this noise propagates through the AC mains—disrupting nearby electronics, failing regulatory compliance (e.g., CISPR 22/32, FCC Part 15, EN 55032), and risking product certification rejection. An EMI filter placed between the AC input and rectifier stage serves two critical functions: it attenuates incoming noise before it reaches the converter’s sensitive control circuitry, and it blocks outgoing noise generated by the switching action from coupling back into the grid. Conducted emissions dominate from 150 kHz to 30 MHz; radiated emissions extend beyond 30 MHz but are often secondary concerns for Class B commercial equipment. Because SMPS topologies like flyback, boost, and LLC inherently produce asymmetric current waveforms and parasitic ringing, their dominant conducted noise mechanism is common-mode (CM), making CM suppression the highest priority in filter architecture.

Common-Mode vs. Differential-Mode Noise: Physics and Separation

Noise on AC input lines can be decomposed into two orthogonal components: common-mode and differential-mode. Understanding their physical origins and measurement is foundational to effective filter design.

Physical Models and Current Paths

Differential-mode (DM) noise appears as a voltage or current signal between the live (L) and neutral (N) conductors. It behaves like a conventional signal source with 180° phase opposition across L and N—i.e., when current flows into L, an equal magnitude flows out of N. DM noise originates primarily from the rectifier’s high dv/dt switching and resonant tank oscillations, and is best suppressed using X capacitors and series DM inductors.

Common-mode (CM) noise, by contrast, manifests as in-phase currents flowing from both L and N lines into earth ground (or chassis). These currents arise from parasitic capacitances between primary-side switching nodes (e.g., MOSFET drain, transformer primary) and secondary-side or heatsink references. The resulting displacement current couples through stray capacitance to the AC input lines and returns via the safety ground path. CM noise dominates above ~500 kHz and requires Y capacitors and CM chokes for attenuation.

In practice, a noise separator (a passive, calibrated network) is used during pre-compliance testing to isolate measured line voltages into V_CM and V_DM spectra. This separation enables targeted filter design: applying DM suppression where V_DM exceeds limits, and CM suppression where V_CM breaches thresholds—without over-engineering one side at the expense of the other.

Safety Capacitors: X and Y Types Explained

Safety capacitors are not ordinary film or ceramic parts—they are rigorously tested, certified components designed to fail safely under overvoltage, surge, or thermal stress. Their classification per IEC 60384-14 defines maximum impulse withstand, insulation type, and application boundaries.

Function and Placement

X capacitors connect across the L–N line pair and absorb DM energy by providing a low-impedance shunt path at high frequencies. Y capacitors connect from L-to-ground and N-to-ground (always in matched pairs) to divert CM currents away from the mains and into a controlled chassis ground return.

Classification and Ratings

The following table summarizes key distinctions:

Class	Position	Typical Value Range	Key Safety Rating	Primary Use Case
X1	L–N	0.1–1.0 µF	>2.5 kV peak impulse	Industrial equipment with high transient risk (e.g., motor drives)
X2	L–N	0.1–0.47 µF	≤2.5 kV peak impulse	Commercial SMPS (most common choice)
Y1	L–G / N–G	1000–4700 pF (per cap)	>8 kV DC, double/reinforced insulation	Medical, industrial, or any application requiring reinforced isolation
Y2	L–G / N–G	1000–4700 pF (per cap)	>5 kV DC, basic/supplementary insulation	Consumer electronics, office equipment (most widely used)
Y4	L–G / N–G	<1000 pF	>2.5 kV DC, basic insulation <150 VAC	Low-voltage auxiliary supplies, SELV circuits

Leakage current is the governing constraint for Y capacitor selection. Per IEC 60950-1 and UL 62368-1, earth leakage must remain below 0.35 mA for temperate-climate equipment and 0.7 mA for subtropical applications. Since leakage current I_leak ≈ 2π·f·V·C_Y,total, where f = 50 Hz, V = 230 VAC, and C_Y,total = C_Y1 + C_Y2, the maximum allowable Y capacitance is approximately 4800 pF. Hence, the industry-standard pair of 2200 pF or 3300 pF Y2 capacitors (totaling 4400–6600 pF) is carefully chosen to balance attenuation and compliance. Exceeding this limit risks tripping RCD/GFCI breakers or violating safety agency requirements.

Differential-Mode Inductor Design: Core Selection and Sizing

A DM choke is a single-winding inductor placed in series with either the L or N line (often both, for symmetry). Its purpose is to form an LC low-pass stage with the X capacitor(s), attenuating DM noise above its cutoff frequency.

Core Material and Geometry

Metallic powder cores—especially iron-silicon (FeSi) and iron-silicon-aluminum (FeSiAl)—are preferred over ferrites for DM chokes because they exhibit superior DC-bias performance: inductance remains stable even under full-load DC current, avoiding saturation-induced distortion and loss of filtering effectiveness. Ferrites, while offering higher permeability, suffer rapid inductance roll-off above ~20% of saturation current.

Design Equations and Constraints

The fundamental design relationship is the LC cutoff frequency:

F_R,DM = 1 / (2π·√(L_DM·C_X))

Rearranged to solve for inductance:

L_DM = 1 / [(2π·F_R,DM)²·C_X]

Additional constraints include:

Flux density limit: B = (L·I) / (N·A_e) < 0.3 T (to avoid core saturation)
Stored energy: W = (N·I)²·A_L / 2000 (µJ), used to verify core size adequacy
Turns calculation: N = √(L / A_L), where A_L is the core’s inductance factor (nH/turn² or mH/1000 turns)

For example, targeting F_R,DM = 12 kHz with C_X = 0.47 µF yields L_DM ≈ 374 µH. Accounting for ~36 µH of inherent leakage inductance from the CM choke, the dedicated DM inductor should contribute ~169 µH per leg—rounded to a standard value of 180 µH.

Common-Mode Choke Design: Toroids, Materials, and Winding Practice

A CM choke contains two identical windings on a shared magnetic core. When line current flows differentially (L forward, N return), the magnetic fluxes cancel—resulting in negligible impedance to normal operation. For CM noise (L and N in-phase), fluxes add constructively, presenting high impedance proportional to the square of turns.

Ferrite Core Selection

Toroidal ferrites are most common due to minimal leakage flux and cost-effectiveness. E-cores offer higher manufacturability and intentional leakage inductance—useful when a single component must handle both CM and residual DM. Material grade critically impacts frequency response:

J material: Balanced impedance from 1–20 MHz; most widely adopted for general-purpose SMPS
W material: 20–50% higher impedance at 1 MHz; ideal for high-noise, low-frequency-dominant converters
K material: Up to 100% higher impedance above 2 MHz; optimal for fast GaN-based designs operating >1 MHz

Single-Layer Toroid Winding Procedure

To maximize CM impedance and avoid self-resonance or inter-winding capacitance, follow these steps:

Select wire gauge based on RMS current: conservative density = 400 A/cm²; aggressive = 800 A/cm² (requires thermal validation)
Determine minimum inductance from target impedance Z_S at frequency f: L_C = Z_S / (2π·f)
Choose core using the LI product chart (L in mH × I in A); e.g., 2.4 mH × 3 A = 7.2 mH·A → selects W-41809-TC (A_L = 12.2 mH/1000 turns)
Calculate turns: N = √(L / A_L) = √(2.4 / 0.0122) ≈ 14 turns per winding (round to 12–14 for margin)
Wind bifilar, single-layer with ≥30° physical separation between windings to prevent asymmetric saturation and reduce inter-winding capacitance

Measured leakage inductance (typically 1–5% of CM inductance) becomes a free DM choke—leveraged in compact two-stage filters to reduce part count.

Step-by-Step EMI Filter Sizing Procedure

A robust design process avoids over-filtering, minimizes cost and volume, and ensures repeatable compliance. Below is a validated 9-step procedure derived from a real-world 43 W, 90 kHz flyback design targeting VDE EN 55032 Class B with 6 dB design margin.

Step 1–2: Baseline Measurement and Attenuation Targeting

Using a calibrated LISN and spectrum analyzer with a noise separator, measure raw V_CM and V_DM (in dBµV). Subtract the applicable limit (e.g., 46 dBµV at 150 kHz for Class B) and add 3 dB margin:

V_req,CM (dB) = V_CM (dB) − V_Limit (dB) + 3 dB

Step 3: Corner Frequency Selection

Required attenuation slope (typically 40 dB/decade for CM, 20–30 dB/decade for DM) dictates corner frequencies. For the example: F_R,CM = 40.3 kHz, F_R,DM = 12 kHz.

Step 4: Y Capacitor Selection

Start with leakage constraint: C_Y,total ≤ 4700 pF → choose C_Y1 = C_Y2 = 3300 pF.

Step 5: CM Inductor Calculation

Using C_Y = 3300 pF and F_R,CM = 40.3 kHz:

L_C = [1/(2π·F_R,CM)]² × 1/(2·C_Y) = 2.36 mH → select 2.4 mH

Step 6: DM Inductor Options

Three practical configurations evaluated:

Option A: Use only leakage inductance (36 µH) → requires C_X ≈ 4.75 µF (physically impractical)
Option B: Standard C_X = 0.47 µF → L_DM = 374 µH → net L_D = (374 − 36)/2 = 169 µH → select 180 µH
Option C: C_X = 0.2 µF → L_DM = 800 µH → L_D = 382 µH → select 380 µF

Option B offers best balance of size, cost, and performance.

Step 7–9: Impedance Interaction Check, Layout Validation, and Prototype Test

Verify source/load impedance mismatch at filter ports using network analysis. Simulate or measure insertion loss with 50 Ω terminations. Finally, validate layout adherence: short leads, grounded filter case, no shared traces between filtered/unfiltered sections.

Insertion Loss: Why Datasheet Curves Lie (and How to Fix It)

Insertion loss (IL) is defined as:

IL (dB) = 20·log(V₁/V₂)

where V₁ is the noise voltage without the filter and V₂ is the voltage at the output port—both measured into a 50 Ω load. While manufacturers publish IL curves under ideal 50 Ω conditions, real-world SMPS present highly reactive, frequency-dependent impedances: the rectifier input looks capacitive below 100 kHz and inductive above; the grid exhibits variable source impedance (100 Ω at 150 kHz, rising to kΩ at 10 MHz).

Thus, a filter rated for 60 dB IL at 1 MHz may deliver only 25 dB in situ if installed incorrectly. Mitigation relies on installation discipline:

Mount directly at the AC inlet—no unfiltered wiring inside the enclosure
Keep capacitor leads <5 mm long to push series resonance above 100 MHz
Ground the filter case to chassis with low-inductance connection (multiple screws or metal standoffs)
Separate input and output cables by ≥5 cm or insert a grounded copper shield plate between them
Avoid routing filter output near high-dv/dt nodes (e.g., MOSFET drains, transformer primaries)

FAQ

What’s the difference between X1 and X2 capacitors—and which should I use?

X1 capacitors are rated for impulse voltages >2.5 kV and ≤4.0 kV, making them suitable for industrial environments with high transient risk (e.g., motor drives, factory mains). X2 capacitors (≤2.5 kV) are rated for general commercial and residential applications and are the default choice for most switch-mode power supplies. Using X1 where X2 suffices adds cost and volume without benefit; substituting X2 in an X1-design violates safety certification.

Can I increase Y capacitance to improve CM attenuation?

No—exceeding the total Y capacitance limit (typically ≤4700 pF) violates earth leakage current requirements (≤0.35 mA for temperate equipment). Higher Y values increase shock hazard, risk nuisance tripping of RCDs/GFCIs, and invalidate safety certifications like UL, CSA, or CE. If CM attenuation is insufficient, optimize the CM choke impedance or add a second filter stage—not larger Y caps.

Why does my filter pass CISPR 22 but fail EN 55032?

EN 55032 (replacing CISPR 22) introduces stricter limits in the 150–500 kHz band and mandates testing up to 6 GHz for radiated emissions. More critically, it enforces tighter measurement uncertainty budgets and requires evaluation under worst-case load and line conditions. A filter passing older standards may lack sufficient low-frequency CM attenuation or have inadequate shielding—verify performance from 150 kHz upward and retest with full-load, 230 VAC, and worst-case cable configurations.

How do I select the right CM choke material: J, W, or K?

Choose J material for broad-spectrum suppression in conventional Si-based SMPS (100 kHz–1 MHz). Select W material if your baseline noise peaks strongly around 1 MHz (e.g., PFC stages or high-current flybacks). Opt for K material only for ultra-fast topologies using GaN or SiC switches operating >1.5 MHz, where high-frequency impedance (>2 MHz) is the limiting factor. Always verify with impedance-vs-frequency plots—not just datasheet “typical” curves.

Is it acceptable to omit the DM choke and rely only on X capacitors?

Only for very low-power, low-noise applications (<5 W) or designs with inherently low dv/dt (e.g., linear post-regulators). In most SMPS, X capacitors alone provide insufficient DM attenuation above 1 MHz due to ESL (equivalent series inductance) dominating their impedance. A DM choke adds essential series impedance, enabling steeper roll-off and preventing resonance with X-capacitor ESL. Omitting it risks failure at 2–10 MHz—a common pain point in pre-compliance testing.

Ready to resolve your SMPS EMI challenges? Our power electronics engineering team specializes in compliant, production-ready filter design—from noise diagnostics and component selection to layout review and pre-compliance validation. Contact our engineers today.