Q: What are the decoupling capacitor placement best practices for high-speed MCUs?
Answer
Place decoupling capacitors as close as physically possible to the power pins: <1 cm for VDD pins <0.5 cm for analog supplies. Use multiple capacitor values in parallel (100 nF + 10 nF + 1 nF) to cover a wide frequency range of impedance. The smaller the package (0402/0201) the lower the ESL at high frequencies. On STM32H7 with high-speed switching use a ferrite bead in series with the analog supply (VDDA) to isolate digital noise. Bulk capacitors (4.7-47 uF) should be within 2-3 cm for low-frequency decoupling. Route power to pins with short wide traces. Verify PDN impedance with a VNA up to the Nyquist frequency of the switching transients.
Filed under: FAQ