Case Study: Multi-Topology SMPS Design Collection
1. Introduction
Isolated DC-DC converters are the backbone of modern power electronics, appearing in everything from 5W USB chargers to 500W server power supplies. This case study examines three fundamental topologies — Flyback, LLC Resonant Half-Bridge, and Active Clamp Forward (ACF) — each optimized for a distinct power bracket. The analysis draws from a curated collection of production-grade reference designs, complete with bill-of-materials data, transformer design parameters, and control loop tuning methodology.
Power Range Guide:
Flyback: 5W–150W (cost-optimized, universal input) | Active Clamp Forward: 100W–300W (high efficiency, low EMI) | LLC Resonant: 150W–500W+ (peak efficiency, high power density)
2. Flyback Converter: UC3842 + TL431 + PC817
2.1 Topology and Operation
The flyback converter is the most cost-effective isolated topology for sub-150W applications. During the MOSFET ON-time, energy is stored in the coupled inductor (transformer with an air gap); during OFF-time, stored energy is transferred to the secondary through the output rectifier. The UC3842/UC3843 current-mode PWM controller provides cycle-by-cycle current limiting and simplified Type-II compensation.
| Component | Part Number | Function |
|---|---|---|
| PWM Controller | UC3842 (UVLO: 16V ON / 10V OFF) / UC3843 (8.4V ON / 7.6V OFF) | Current-mode control, 500kHz max, 1A totem-pole output |
| Voltage Reference + Error Amp | TL431 (2.5V ±1%) | Secondary-side precision voltage regulation |
| Optocoupler | PC817 (CTR 80–160%) | Isolated feedback across primary-secondary boundary |
| Integrated Solution | TOP232Y–TOP234Y (Power Integrations TOPSwitch-FX) | 700V MOSFET + controller in single TO-220 package, 10W–75W |
| Primary MOSFET | IRF840 (500V/8A, Rds(on)=0.85Ω) | Standard flyback switching device for 90–265VAC universal input |
| Output Rectifier | MBR20100CT (100V/20A Schottky) | Low Vf for 5V–24V output rails |
| Snubber Network | RCD clamp: UF4007 + 100kΩ/2W + 2.2nF/1kV | Leakage inductance energy absorption |
2.2 Design Methodology
The transformer is the heart of any flyback design. For a typical 65W universal-input (90–265VAC) design with 19V/3.4A output:
- Core selection: PQ2620 (Ae=119mm²), material PC40 (TDK equivalent), for 65kHz operation
- Primary inductance Lp: 620μH (DCM/CCM boundary at low line)
- Turns ratio Nps: 6:1 (Np=36T, Ns=6T), auxiliary bias winding Naux=5T
- Air gap: 0.76mm in center leg to prevent saturation at peak current (Ipk≈2.8A)
- Maximum duty cycle Dmax: 0.45 (set by UC3842 oscillator: Rt=10kΩ, Ct=3.3nF → fsw=65kHz)
UC3842 vs UC3843 — Startup Voltage Difference:
The UC3842 starts at 16V and shuts down at 10V, requiring a higher auxiliary winding voltage. The UC3843 starts at 8.4V and shuts down at 7.6V, making it preferable for low-output-voltage designs (5V/3.3V) where the auxiliary winding produces fewer turns and lower voltage. The feedback compensation network is identical between the two.
3. LLC Resonant Half-Bridge: L6599 200W Reference Design
3.1 Resonance and Soft-Switching Physics
The LLC resonant converter achieves zero-voltage switching (ZVS) on the primary-side MOSFETs and zero-current switching (ZCS) on the secondary-side rectifiers — eliminating turn-on losses and reducing EMI to near-theoretical minimums. The resonant tank consists of the magnetizing inductance (Lm), series resonant inductor (Lr), and resonant capacitor (Cr), forming two resonant frequencies:
Resonant Frequencies:
Upper resonance (series): fr = 1 / (2π × √(Lr × Cr)) = 100 kHz
Lower resonance (with Lm): fm = 1 / (2π × √((Lr + Lm) × Cr)) = 32 kHz
Inductance ratio: k = Lm / Lr = 7.8 — balancing circulating current loss against gain range
3.2 L6599 Control IC
The STMicroelectronics L6599 is a dedicated high-voltage resonant controller featuring:
- 50% fixed duty cycle with adjustable dead-time (200ns–800ns) for ZVS optimization
- Burst-mode operation at light load for standby power compliance
- Dual-level overcurrent protection: frequency shift on first threshold, latched shutdown on second
- High-voltage startup (600V-rated) with integrated bootstrap diode
- Soft-start with programmable duration and frequency sweep from fstart (up to 3× fmin) down to fmin
| Parameter | Value | Notes |
|---|---|---|
| Input Voltage | 380–400 VDC (PFC output) | Typical for universal AC input with boost PFC front-end |
| Output | 24V / 8.3A (200W) | Server/industrial auxiliary rail |
| Resonant Inductor Lr | 68 μH | External inductor or integrated leakage (PQ3535) |
| Magnetizing Inductor Lm | 530 μH | Measured with secondary open |
| Resonant Capacitor Cr | 2 × 15 nF parallel = 30 nF | 630V polypropylene film, low ESR |
| Primary MOSFETs | STP20NM60 (600V/20A, Rds(on)=0.29Ω) | MDmesh II, TO-220 |
| Output Rectifiers | STPS40L45CT (45V/2×20A Schottky) | Center-tapped secondary, TO-220AB |
| Transformer Core | PQ3535, PC47 material | Np=36T, Ns1=Ns2=4T (center-tapped) |
3.3 Design Insights
The Ln ratio (Lm/Lr = 7.8) is the single most critical design choice in an LLC converter. A low ratio (3–5) provides wider gain range but increases circulating current and conduction losses. A high ratio (8–10) improves efficiency but narrows the gain range, requiring tighter regulation from the PFC front-end. The 7.8 value in this design represents a balanced compromise for a ±10% input voltage tolerance.
4. Active Clamp Forward Converter: 100W Reference Design
4.1 Topology and Clamp Operation
The active clamp forward (ACF) converter replaces the traditional tertiary reset winding with an auxiliary MOSFET and clamp capacitor across the transformer primary. This achieves three objectives simultaneously: transformer core reset without a reset winding, zero-voltage switching of the main MOSFET, and recycling of magnetizing energy to the output rather than dissipating it. The design was contributed by the NUAA (Nanjing University of Aeronautics and Astronautics) power electronics group.
| Parameter | Value | ||
|---|---|---|---|
| Input | 36–72 VDC (telecom nominal 48V) | ||
| Output | 3.3V / 30A (100W) | ||
| Switching Frequency | 200 kHz | ||
| Transformer Core | PQ3535, PC40 material | ||
| Main Switch | IRFP250N (200V MOSFET) | ||
| Clamp Switch | IRF640 (200V MOSFET, smaller die) | ||
| Clamp Capacitor | 0.47μF / 250V polypropylene | ||
| Output Rectifier | IRL3803S (30V/140A, Rds(on)=6mΩ, synchronous rectification) |
| Parameter | Flyback (UC3842) | Active Clamp Forward | LLC Resonant (L6599) |
|---|---|---|---|
| Power Range | 5W–150W | 100W–300W | 150W–500W+ |
| Peak Efficiency | 85–88% | 90–93% | 94–96% |
| Transformer Utilization | Single quadrant (unidirectional) | Single quadrant (reset via clamp) | Full bridge, bidirectional flux |
| Output Ripple Frequency | fsw (65–100kHz) | fsw (200kHz typ.) | 2 × fsw (200kHz ripple at 100kHz) |
| EMI Profile | Poor (hard switching, high di/dt at turn-off) | Good (ZVS on main switch) | Excellent (full ZVS + ZCS, sinusoidal currents) |
| Control Complexity | Simple (Type-II compensator) | Moderate (complementary PWM + dead-time) | Complex (frequency modulation, burst mode, 2-level OCP) |
| Transformer Design | Gapped (energy storage) | Ungapped (pure transformer) | Integrated magnetics (Lr as leakage + Lm) |
| Component Count | Lowest (~25 BOM lines) | Moderate (~35 BOM lines) | Higher (~45 BOM lines) |
| Transient Response | Good (RHP zero limits BW) | Excellent (no RHP zero) | Moderate (resonant tank dynamics) |
| Standby Power | Moderate (skip-cycle) | Good (burst mode) | Excellent (burst mode, <0.5W achievable) |
| Best Application | Adapters, auxiliary supplies | Telecom DC-DC, PoL converters | Server PSUs, EV onboard chargers, LED drivers |
6. FAQ
Q1: Why is the flyback maximum duty cycle limited to 0.45?
Two reasons: First, the flyback transformer requires volt-second balance — if D > 0.5, the reset voltage must be higher than the input voltage, stressing the MOSFET. Second, current-mode controllers like the UC3842 require slope compensation when D > 0.5 to prevent subharmonic oscillation. By limiting Dmax to 0.45, the design avoids both issues without additional slope compensation circuitry, simplifying the BOM.
Q2: How do you choose between Ln = 5 and Ln = 10 for an LLC converter?
Lower Ln (3–5) gives wider voltage gain range — useful for wide-input-variation applications like battery chargers. However, lower Ln means larger circulating current in the resonant tank, increasing conduction losses. Higher Ln (8–10) improves efficiency but narrows the gain range. For a fixed 400V PFC bus with ±5% regulation, Ln=7–8 is optimal. For a 250–450V battery charging application, Ln=4–5 is necessary to cover the full voltage range.
Q3: UC3842 vs UC3843 — when does the startup threshold matter?
The choice depends on the auxiliary winding voltage at startup. In a 12V-output flyback with a 6:1 turns ratio, the reflected output voltage during startup (before regulation kicks in) may only reach 8–10V at the auxiliary winding. A UC3842 with its 16V UVLO threshold would fail to start. The UC3843’s 8.4V startup threshold works reliably in this scenario. For 24V+ outputs, either controller works fine.
Q4: What is the dual-level overcurrent protection in the L6599?
The L6599’s ISEN pin implements two thresholds. The first threshold (0.8V) triggers frequency shift: the switching frequency increases, reducing the resonant tank gain and limiting output current without shutting down. The second threshold (1.5V) triggers a latched shutdown — the controller enters a 150μA low-power state and requires a Vcc power-cycle to restart. This “graceful degradation then hard stop” strategy prevents nuisance trips during momentary overloads while still protecting against genuine short circuits.
Q5: How do you calculate the active clamp forward’s dead-time for ZVS?
The dead-time must be long enough for the magnetizing current to fully discharge the MOSFET’s Coss. The required time is tdead = π × √(Lm × Coss) / 2. For Lm=200μH and total node capacitance (Coss_main + Coss_clamp + Cstray) ≈ 600pF: tdead ≈ 545ns. The magnetizing current at turn-off must be large enough to complete the Coss discharge within this window — if too small, ZVS is lost. The minimum magnetizing current for full ZVS: Im,pk > Vin × √(2 × Coss / Lm).